Atomera（ATOM）2026年第3四半期決算説明会：GAAの進展とIQEとのGaN提携

主要なポイント

• アトメラの2026年第3四半期の売上高は、当四半期中に収益を伴うウエハ出荷がなかったため0ドルとなりました。前年同期は1万1000ドル、2026年第2四半期は15万8000ドルでした。
• GAAP基準の純損失は、前年同期の560万ドルから600万ドルへと拡大しました。Non-GAAP基準の純損失は460万ドルとなり、2025年第3四半期の440万ドルから拡大しました。
• 当四半期末時点の現金・現金同等物および短期投資残高は3,480万ドルとなり、6月30日時点の3,840万ドルから減少しました。営業キャッシュアウト（使用額）は320万ドルでした。
• アトメラは現在、ゲート・オール・アラウンド（GAA）技術を開発している4社のうち3社との協力体制を構築しており、残り1社とも積極的な協議を続けています。顧客2社が自社シリコン上でMSTのテストを行っており、3社目はより初期の評価段階にあります。
• 同社は次世代DRAMおよび3D NAND全般においてメモリイニシアチブを拡大し、MSTを活用したGaN-on-siliconウエハの量産化に向け、IQEと共同開発協定を締結しました。
• 経営陣は第4四半期におけるウエハ納入による売上高を約5万ドルと予想しており、2026年通期のNon-GAAP営業費用については、従来の見通しである1,825万ドル〜1,875万ドルのレンジの上限付近になるとのガイダンスを維持しています。

主要財務データ

アトメラは第3四半期中にATMプログラムを通じた株式発行を行っておらず、売却を行わなかったのは2四半期連続となります。

事業および業績の動向

ゲート・オール・アラウンドの取り組み拡大

アトメラは、主要なゲート・オール・アラウンド開発企業との積極的な取り組みという、掲げていた2026年の目標を達成しました。同社は市場の主要4社のうち3社と協力しており、残り1社とも協議を継続しています。

顧客2社は自社シリコン上でMST成膜のテストを行っており、膜の均一性、後続工程との適合性、ドーパント拡散制御、電気的特性を評価しています。経営陣によると、アトメラはこれまでに設定されたマイルストーンを達成しており、テスト結果の失敗を理由に評価を終了した顧客はありません。3社目の取り組みは依然として初期段階にあります。

メモリの機会がDRAMおよびNANDに拡大

DRAMにおいて、アトメラは高帯域幅メモリ（HBM）に使用される最先端ロジックベースウエハと4F2垂直セルアーキテクチャの両方をターゲットにしています。経営陣は、MSTが垂直型トランジスタにおけるリンの拡散制御に寄与し、高コストな製造工程を削減できる可能性があると述べています。同社は9月のSISPADにおいて、査読付き論文でこの手法を発表しました。

3D NANDに関して、アトメラはロジックダイと拡大するメモリアレイダイとの間の潜在的なサイズ不均衡を解消するため、CMOSゲート長の短縮に取り組んでいます。顧客との協議はまだ初期段階ですが、経営陣は大手メモリメーカーからの関心や実証データを挙げています。

IQEとの協定によりGaN-on-siliconの製造プロセスを確保

アトメラは、MSTシリコン基板上でのGaNエピタキシャル成長を網羅する共同開発協定をIQEと締結しました。この取り組みは、低コストで高性能なRF GaN-on-siliconウエハを最適化し、大量生産および顧客向けサンプル出荷への確実な道筋を確立することを目的としています。

経営陣によると、RF GaN市場は現在約12億ドル規模であり、数年以内に20億ドル近くまで拡大する可能性があるとのことです。IQEとの協定はパワー半導体用途もカバーしていますが、当初の焦点はRF用途に置かれています。

「Prima」および「Selecta」プロダクトブランドの発表

アトメラは、全面成膜（ブランケット）を行うMSTスターティングウエハ向けの「Prima」と、半導体デバイス内に選択的にMSTを統合する「Selecta」を発表しました。Primaの応用領域は、RF-SOI、GaN-on-silicon、メモリを含め、過去1年間で2分野から6分野へと増加しました。

経営陣は、顧客がトランジスタ工程全体を再設計することなくスターティングウエハを評価・統合できるため、Prima製品は一般的により迅速に量産へと移行できると考えています。一方、Selectaはゲート・オール・アラウンドやパワーデバイスなどの用途に使用されます。

同社の主要なアナログ・パワー半導体プログラムは計画通り進行しており、顧客の次世代デバイスノードへのMST採用に向けた試作ウエハの共同処理が進行中です。

業績見通し（ガイダンス）

• アトメラは、2026年第4四半期に約5万ドルのウエハ納入売上高を計上する見込みです。経営陣は、ウエハ関連の売上高には偏りがあり、長期的な見通しは限られていると注意を促しています。
• 2026年通期のNon-GAAP営業費用は、引き続き約1,850万ドル（±25万ドル）となる見込みです。製造装置のリース費用、計測費用、およびデバイス試作費用の増加により、経営陣は引き続き同レンジの上限付近での着地を想定しています。
• 第4四半期の営業キャッシュアウトは増加する見込みですが、これは主として、2027年通期分の200mm製造装置リース料として10月1日に支払った約140万ドルの前払いによる一時的なものです。経営陣は、これを根本的なキャッシュ使用ペースの変化と解釈すべきではないと述べています。
• 一部の製造装置のリース条件に関する交渉が継続中であるため、同社は2027年の費用ガイダンスを提供していません。

リスクと注目点

• ウエハの納入時期に偏りがあり、長期的な出荷の見通しが立たないため、売上高は依然として変動性が高い状態が続いています。
• 先端ノードの顧客は新材料の採用前に複数の技術的実証を求めるため、ゲート・オール・アラウンドの認定スケジュールの予測が困難になっています。
• アトメラのDRAMおよびNANDへのアプローチに対する顧客の関心は高いものの、メモリ分野での取り組みは依然として比較的初期段階にとどまっています。
• 経営陣は、Primaウエハの量産開始時期についての十分な見通しをまだ得ていません。
• 業界全体における供給の逼迫が、装置の使用費、リース料、計測費、デバイス試作費のコスト上昇を招いています。
• 複数の顧客サイトでの導入作業とアトメラ自社施設での作業が重複した場合、追加の技術要員が必要となる可能性があります。

アナリスト質疑応答の要点

• ゲート・オール・アラウンドのマイルストーン：経営陣によると、最初の顧客2社は自社シリコン上でMSTを評価しています。アトメラは現在までのマイルストーンを達成しており、新たに追加された3社目の顧客はマイルストーン完了に至るほどまだ進んでいません。
• IQE開発の時期：経営陣は、計画されているIQEとの取り組みを複数年にわたる開発というよりは短期的なものと説明しましたが、量産時期については示しませんでした。
• RF-SOIの規模拡大：アトメラは顧客との取り組みに基づき、同社のRF-SOI技術ソリューションは確立されたと考えています。現在の取り組みは、より高速なMST成膜と、大容量のウエハをサポートできる製造フローに焦点を当てています。
• PrimaとSelectaの比較：経営陣は、選択的に統合されるSelectaプロセスよりも認定プロセスを短縮できる可能性があるため、Primaスターティングウエハ製品の方が早期に量産に至る可能性が高いと述べました。
• STマイクロエレクトロニクス：アトメラは引き続きSTマイクロエレクトロニクスとの協議を続けています。経営陣は同社との関係や提示した技術成果に自信を示したものの、現時点で発表できる合意事項はないと述べました。
• 稼働能力：同社は現時点で広範な人員拡大を予想していませんが、顧客サイトでの導入作業に伴い、追加のリアクターオペレーターが必要になる可能性があります。

決算説明会（トランスクリプト）全文

決算説明会の完全なトランスクリプト

経営陣による説明

Mike Bishop

Hello, everyone, and welcome to Atomera's Third Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations. As in prior quarters, we are using Zoom, and we will follow a similar presentation format with [Operator Instructions] we will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.

Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24, 2026.

Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website. And with that, I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Scott Bibaud

Thanks, Mike, and good afternoon, everyone. When I look back on Q3, what stands out is how many long-running efforts came to a head in the last 90 days. We hit a gate-all-around target we publicly committed to in February. We extended MST into a part of the memory market we've never served before, and we turned our GaN on Silicon breakthrough into a manufacturing relationship with a world-class wafer supplier. Let me take those in order, gate-all-around first, then memory, then our power and RF pipeline, and I'll close on GaN.

Gate-all-around is quite simply the hardest manufacturing problem the industry is facing today, building transistors with features thousands of times thinner than a human hair while holding individual dopant atoms exactly where they belong through the downstream thermal budget is precisely the kind of problem MST was created to solve.

Only 4 companies in the world are developing gate-all-around and back in February, I set a clear objective for the year to be actively engaged with the leaders driving this transition. Today, I can tell you we've met that objective. We're now engaged with 3 of the 4 gate-all-around customers, and we remain in active dialogue with the 4. If our efforts with these players pan out, MST will become a standard ingredient in all future leading-edge logic nodes. While each of these engagements are in a different phase from early evaluation stage to running development demonstrations on customer silicon, together, they position MST as a solution to one of the biggest challenges confronting teams developing gate-all-around nodes and the CFET generation that follows it.

Advanced node customers move deliberately, asking for proof point after proof point before they take any new material into production. So every stage we clear carries weight. Memory is where I see the curve bending upwards fastest. The pressure on memory makers to bring more capacity and performance out of every wafer has rarely been greater. And importantly, they have both the urgency and the resources to qualify new approaches. In Q3, we broadened our reach to memory manufacturers spanning both halves of the market, next-generation DRAM and NAND flash.

Let me linger on DRAM for a moment because it shows how MST creates value for 2 different next-gen DRAM requirements. First, AI has driven demand for high-bandwidth memory, which uses leading-edge logic as the base wafer. We are leveraging our gate-all-around know-how and using it to help achieve similar gains in these base wafers.

Second, for decades, the industry made DRAM cells smaller with finer lithography, but that lever is nearly exhausted. The next move for some memory makers is a denser cell, the industry calls 4F squared, which tips the access transistor up on its end, a virtual channel and places the storage capacitor above it, shrinking cell area by about 1/3 with no change in lithography.

The challenge is building a good vertical transistor, and that's Atomera's opening. We are leveraging our phosphorus blocking know-how from gate-all-around to precisely control the dopants, preventing movement into places where they shouldn't be. MST-based vertical transistors can hit the drive current and leakage targets 4F squared requires while stripping out costly process steps. In other words, a cheaper and more manufacturable road to the next DRAM generation. We laid this out in a peer-reviewed paper at SISPAD in September, the industry's premier conference for process and device simulation.

And the response to our paper proved that we were tackling a big problem the industry is grappling with. More importantly, recent visits with the leading memory manufacturers confirmed their interest in just such a solution. NAND is the newer story. As I mentioned last quarter, AI is driving demand for higher-density SSDs, which means the number of layers in a 3D NAND device has to keep climbing. But as layer count increases, so does the logic required to drive it. And the CMOS-based die is projected to grow faster than the memory array die sitting above it. Because of that, CMOS wafer -- because the CMOS wafer is bonded to the array, a size mismatch between the 2 can become an expensive problem. MST helps solve it by enabling shorter gate lengths so the 2 die can be size to match, making for far more cost-effective solutions. These engagements are still early, but they're encouraging, both in terms of the customer problem we're addressing and the real silicon data behind our approach.

And as you can imagine, the market size is enormous. Across the rest of the pipeline, momentum is steady. Our large ongoing program with a major analog and power manufacturer is tracking to plan. The 2 engineering teams are in lockstep executing wafer runs with the objective of including MST in the next node of customer devices. Elsewhere in power and RF-SOI, we're moving several new customers forward, putting MST to work on devices like trench and HTs whose efficiency and high-frequency behavior matter more by the day as AI data centers reshape how power is delivered.

And internally, our high-throughput RF-SOI process effort, we're locking down the right substrate supply chain is pivotal, keeps advancing and should translate to other applications as well. That brings me to GaN-on-silicon, which was a standout this quarter. Start with the size of the prize. As RF moves to the next generation, designers increasingly reach for GaN because of its raw power and bandwidth right up to fully integrated front ends that fold in the power amplifier.

The RF GaN market sits near $1.2 billion today and is compounding at double digits towards roughly $2 billion within a few years. Moreover, this breakthrough is likely to expand the TAM by opening new applications, which integrate with silicon devices at 200- and 300-millimeter wafer sizes.

As a reminder, our breakthrough earlier this year brought MST-enabled GaN-on-silicon within striking distance of advanced RF-SOI on the 2 numbers designers live by, loss and linearity, but on a low-cost silicon wafer rather than a costly specialty substrate that this type of performance has typically demanded. If design activity starts shifting towards GaN-on-silicon, we'd be standing at the front of a large and fast expanding market. This quarter, we announced something new, a route to manufacturing in the form of a joint development agreement with IQE announced last week.

IQE is among the world's foremost manufacturers of compound semiconductor epitaxy, the precision crystal growth step beneath every GaN wafer. Under the JDA, IQE's GaN epitaxy grown on MST silicon substrates will be optimized to identify the best low-cost, high-performance RF GaN-on-silicon wafers possible. This work, which has already begun, will allow us to improve performance. At the same time, we are solving the manufacturing side of the equation, meaning we short circuit the qualification cycle normally required before production.

A JDA like this is what moves us from a lab result to a product. IQE gives us a credible, high-volume production path and a way to put real sample wafers into the hands of foundry, IDM and fabless designers. We're starting with RF, but the agreement covers GaN for power as well, broadening the opportunity further. In short, IQE is a catalyst to get MST GaN-on-silicon to market faster, and we believe they can become an important producer of MST-enabled wafers. Atomera offers MST in 2 forms. One is a blanket deposition that customers can buy and use a starting wafer and the other is deposited inside a customer's transistor.

Over the last few years, we've emphasized starting wafer offerings because they are easier for customers to trial and integrate and therefore, represent a faster path to revenue for Atomera. A year ago, we had 2 applications for those starting wafers, and now we're up to 6, including RF-SOI, GaN-on-silicon, memory applications and more. Therefore, today, we are introducing the Prima brand for those products. Our more traditional offering where MST is integrated selectively into the middle of a semiconductor device will now be known as Selecta.

Applications such as gate-all-around, power devices and HPT use the Selecta process. We're introducing these brand names to highlight the growing importance of starting wafer solutions within Atomera's product portfolio. You'll find much more on Prima Selecta and how MST enhances transistors on our newly refreshed website, which should go live tomorrow. It tells the MST story far more clearly across logic, memory, RF and power, and I'd encourage you to spend a few minutes exploring our offerings there. Putting it together, we delivered on the February gate-all-around goal by reaching 3 of the 4 customers in that market. We widened the memory opportunity to span both DRAM and NAND and rolled out MSD for 4F squared. We kept the power and RF programs on course, and we turned our GaN breakthrough into a future production partnership with IQE. There is indeed a great deal to be excited about at Atomera right now. With that, I'll turn the call over to Frank to review our financials.

Francis Laurencio

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the third quarter of 2026. This slide shows our summary financials. We recognized no revenue in the third quarter compared with $11,000 in the third quarter of 2025 and $158,000 in the second quarter of this year. As we've noted before, our revenue in recent quarters has consisted of fees tied to wafer deliveries and MST CAD licenses.

Wafer deliveries are lumpy from quarter-to-quarter and no wafer shipments for revenue fell in Q3. Our GAAP net loss for the third quarter of 2026 was $6 million or $0.15 per share compared with a net loss of $5.6 million or $0.17 per share in the third quarter of 2025. On a non-GAAP basis, our net loss was $4.6 million compared with $4.4 million in the third quarter of last year. GAAP operating expenses were $6.3 million in the third quarter, an increase of approximately $652,000 from $5.7 million in the third quarter of 2025 and down about $563,000 from $6.9 million in the second quarter.

Stock-based compensation, which is excluded from our non-GAAP results, was $1.7 million compared with $1.3 million a year ago. On a non-GAAP basis, operating expenses were $4.6 million, up about $249,000 year-over-year and down $572,000 from the second quarter of 2026. Year-over-year, non-GAAP R&D increased by $242,000, driven primarily by higher tool access costs. G&A decreased by $60,000 and sales and marketing increased by $67,000.

The sequential decline from the second quarter primarily reflects nonrecurring items in the first half of this year when we were accruing deferred 2025 bonuses. Looking at G&A on a year-over-year basis, you can see those expenses in Q3 of this year increased only modestly over Q3 of 2025, reflecting normal annual bonus accrual and increased IP legal costs.

Our balance of cash, cash equivalents and short-term investments on September 30, 2026, was $34.8 million compared with $38.4 million on June 30. We used $3.2 million of cash in operating activities in the quarter compared with $3.9 million in the second quarter and $3.4 million in the third quarter of last year. We did not sell any shares under our ATM during the last quarter, our second consecutive quarter with no ATM sales. As of September 30, 2026, we had 39.1 million shares outstanding. I need to make a note about fourth quarter cash usage.

Operating cash used will step up this quarter, primarily because of a roughly $1.4 million onetime payment made on October 1 that prepays the lease for our 200-millimeter tool for all of 2027. I want to flag that now because it shouldn't be read as a change in our underlying run rate. As I mentioned earlier, revenue from wafer shipments is lumpy, and we don't have long-term visibility. We expect to recognize revenue for wafer deliveries this quarter of approximately $50,000.

On our last 2 calls, we said we expected 2026 non-GAAP operating expense to be approximately $18.5 million for the year, plus or minus $250,000. And on the second quarter call, I pointed to the high end of that range. That is still our expectation due to the upward cost trend for tool leases, metrology and device fabrication. We flagged this trend last quarter, and it reflects very tight supply in the industry.

Our negotiations on some tool lease terms are still ongoing. So it is too early to give guidance on 2027 expenses, but we will continue to work on keeping our fixed costs as low as possible. With that, I'll turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Scott Bibaud

Thanks, Frank. I hope all of you get a sense for the expanding opportunity space opening up for Atomera and our momentum with leading customers in some really enormous markets. Q3 was a quarter of conversion, a gate-all-around commitment met, memory extended into NAND and 4F squared and a GaN breakthrough carried into a real manufacturing partnership. Our aim from here doesn't change to turn a growing body of simulation and customer silicon evidence into signed agreements that build durable, repeatable revenue with impressive bottom line leverage. Mike, we can now take questions.

Mike Bishop

Thank you, Scott. [Operator Instructions] And right now, our first question comes from Richard Shannon.

質疑応答

Richard Shannon

A couple of questions here. Let's start with gate-all-around, your first topic that you talked about on the call here, a few interesting things to look at here. I guess with the first gate-all-around customer you talked about last quarter, maybe, Scott, if you can just give us a sense of what kind of progress you've made here. I know you made a big step last quarter with the milestone that you're really excited to achieve here. Any way you could characterize the progress since. And I know these learning cycles are oftentimes more than 1 quarter. But if you can help us understand the kind of the progress there and any other milestones you can describe about what you're hoping to achieve maybe this quarter or very soon?

Scott Bibaud

Yes. Let me talk about what customers would expect to see from milestones. So first of all, we have shown on some of our early -- I think on our Q4 earnings call and on some public information, some details of how our MST is integrated into a gate-all-around device and the proof that we've achieved that we can do that on an example device. What is typical with each of these gate-all-around customers is that they -- once we show them that, they start asking us to integrate it onto their silicon or into devices that are much closer to what their silicon looks like. And in many ways, that's an incredibly strong statement of support because to share with us their most confidential gate-all-around devices so that we can do our deposition on them is a big reach for them. It's like they don't do that lightly at all. And I talked about us working with 3 out of 4 today, and we're at that stage with 2 of them. And so there's various milestones that you're going to be in there where they want to see certain physical characteristics of your device in there and your device with some of their technology on top of it, and then they want to be starting to look at electrical results and diffusion blocking results and other things. So all of those are milestones that we have to hit.

So yes, I'd just say that with 2 of our customers, we're at the point where we're in the midst of that. And with one of them, we are earlier to where we're just in the very early stages of the evaluation. But we're really happy about where we are. I think I made the comment about being -- if we're successful, we've always talked about this domino theory. I think if we're successful with these 3 everybody uses MST on all gate-all-around devices. And typically, that would mean they carry it forward into future devices like CFET and beyond.

Richard Shannon

Yes. That makes a little sense. Maybe, Scott, if you can characterize the dynamics regarding the third gate-all-around customer that's coming to what you call active engagement now. Any way you'd characterize the reason for that? Is this the publicly known data that you've shown here or something specific to them? Just help us get a sense of that forcing function.

Scott Bibaud

It's so hard to characterize the customer acquisition process because in many cases, you're kind of knocking on the door and knocking on the door and maybe you get an audience and it's not with the right person are you getting or you're just struggling to find a way into who the right person is. And then finally, you get them and then you're up and running, and that can take a while in some cases. And I would say that's been our experience with a few of these guys, but now we've broken through.

Richard Shannon

Okay. Well, great to hear. Good to see that progress here. Let me ask you a question on the DRAM side here. I think you characterized the industry dynamics here last quarter, kind of a move towards the vertical transistors here in this 4F squared approach here. Would you still characterize the efforts here as early stage? Or what we can all see here is a great deal of interest as well as an ability to fund almost any promising alternative or approach to lowering costs and increasing capacity. Would you still characterize the efforts here as very early stage? Or is this advancing quickly such that you can maybe sense or even see the light at the end of the tunnel there?

Scott Bibaud

Yes. I still think it's relatively early stage on the memory. We -- you may remember, we've been talking about DRAM for many years, and we had an approach that was really focused at LPDDR and like real DRAM. And I think as AI started to ramp up in the last few years, some of the development efforts in that area got redirected much more towards high-bandwidth memory. where the offering that we have for DRAM was less attractive. And so we've adjusted our offerings and now we're looking at everything that's like in these next-generation 3D areas that are super interesting to customers.

In a lot of cases, they are the Prima type of wafer-based solution from us, which will be easier for them to evaluate and adopt. And so I'm hopeful that things move along relatively quickly, but we still are in a bit in the early stages.

Richard Shannon

Okay. That's what I figured. I just want to get a little characterization there. The third question I had was regarding GaN, especially RF and specifically your announcement with IQE last week, which I found quite interesting. I'd love to get a sense of the reasons for IQE wanting to work in the space here. having watched them from my coverage of compound semis for 15-plus years, IQE tends to only move towards these kinds of work partnerships unless they see a very clear end and goal here fairly soon. They generally run on thinner margins, so it's hard for them to reach too far out in front of their skis here.

And my guess is, and I'd love to get your sense of the degree to which this is -- this partnership is based on customers that would be ultimately licensing the technology from you are driving this? Or is this more of a build and they will come initiative on their part?

Scott Bibaud

Yes. So I don't want to comment too much on IQE's motivations, but -- but I will tell you, I think your characterization is right. They are a company that doesn't take on JDA partners lightly. They try to really focus on production vehicles and doing things that are close to production. I think they see a lot of promise in MST and the early data that we've put out there. We've had some very good senior level meetings with them. And I think there's a great opportunity that if we can deliver, I think we can deliver IQE more customers for their GaN production. And so I won't comment on how early they see that happening, but the development that we have contemplated with them is not like a multiyear effort. It's a shorter-term thing that we hope will turn to something faster.

Richard Shannon

Okay. That's fair. That seems to make sense. A couple more questions for me. First of all, I want to touch on RF-SOI. You mentioned last quarter as well, and I think you used the phrase here this quarter, working to enable a high throughput manufacturing flow for RF-SOI. Maybe just describe how far through that process you are? And are there any other steps to enable this technology ecosystem? This is one we've been tracking for a while. And my personal thought, I thought we would have gotten to the point where there would be a production volume in the space here. And so I want to get a sense of how mature that is? And are there other milestones to enable RF-SOI to move forward?

Scott Bibaud

Yes. So our technical solution for RF-SOI is pretty well proven. We've worked with a number of customers to show that. We do have a limited ability to show real silicon test data on that because all of the RF work that we've done has been on customer silicon. It's hard to do on your own silicon. Regardless, we think we have a very good solution there. What the high-volume production path that I've mentioned is we need to be prepared for the day that someone wants to launch in production and do a very high volume per month.

And so we've been talking with manufacturing partners, and they'd like to see an MSP throughput rate that's very -- more rapid than we're doing in R&D. So we have actually done a lot of work to speed up the MST throughput, deposition throughput and even consider doing that throughput on atmospheric tools, which is unusual for us, but it allows the higher pressure does allow you to manufacture wafers at much higher volume. So yes, so we're hoping that when we finally break through and if we get a market up and running on this gate-all-around that we'll be able to deliver that high-volume solution to go with it.

Richard Shannon

Okay. So are you saying that there's work going on with high throughput that would aid not only RF-SOI, but also gate-all-around? Is that what that last comment means?

Scott Bibaud

The interesting thing is that it could apply to many markets, primarily this Prima -- I mean, Prima wafer-based solutions. But yes, it could be applied to a number of them.

Richard Shannon

Okay. And that kind of hit -- kind of directed me to the last question here, which is what I thought of as the blank wafer, which I think you're now marketing as Prima. I made 2 interesting comments I'd love to delve into. First, you said that a year ago, you only had 2 applications in this and now you have 6. And noting what you said in the past where this is a -- should be a much easier route to market. And the fact you have now 6 applications instead of 2 just a year ago seems very interesting to me. So wondering if you could characterize for us the level of maturity across any and all of those 6 applications here. And while I know you've been very reticent to declare which ones -- which end market or even customers are going to get to market first here, Hopefully, it's generic enough to ask you whether you think the Prima brand is the one that gets you across the finish line first to get you in production. Is that a -- do you think that's a strong likelihood? Or is that still one where you're reticent to answer directly?

Scott Bibaud

Yes. I'm always reticent to answer, but no, I think that Prima is -- has a good chance of going faster. With Selecta, which is what we used to call these MST -1 and MST -2, but Selecta is something that people would use for gate-all-around or for power devices. And we know we've been working with customers on that for a while. But once they've integrated it, they've gotten performance going really well, then they have to put it into a process qualification cycle, which isn't all that difficult or long. But then they need to have people design chips with it and then they will go into production, and that's the point at which we're kind of generating royalties. With a product like Selecta, and let's just talk about GaN as an example. So if we got GaN, our GaN solution with IQE tuned up really well in the next 6 months, then really IQE could run just a couple of months' worth of qualification and then start shipping wafers for revenue.

And so it's a lot faster to be able to go to production with the Prima type of product. So although I'm not handicapping the existing customer engagements we have right now, I would say, on balance, if you had 2 of them, the Prima ones will go first.

Richard Shannon

Okay. That makes sense. I ask one more question here. I always like to engage Frank with at least one question here, and I'll just ask it quickly on the OpEx number here. I know you're reticent to suggest how we should look at this line for next year, and I get the rising input costs here to help us think about that. But I guess the one thing I would ask, which I know I have in the past here is it sounds like you guys have a great deal of activity across a lot of different applications, customers and partners that seems like you could be highly utilized and might need to open up the aperture of headcount to enable all of these avenues. Is that something you're contemplating for next year?

Francis Laurencio

So I think that's largely going to be driven by the activity that happens next year where I don't foresee that we need to add headcount right now. But the one thing that could strain headcount is we have operators that work on doing EPI on the reactors that we have to run demos for customers to do our R&D. And to the extent that there is installation activity at customers, and we need to send people on site, if we're balancing that across either multiple customers or a customer and ongoing activity in our own facility, then yes, I could see that, that would be an area that we might need to add additional headcount. But other than that, I don't see headcount being the big issue. I think inflation in the industry is a real issue. If you follow any of the other wafer fab equipment vendors, you've heard a lot of commentary about supply chain difficulty in terms of getting equipment just to be able to deliver them. So that entire ecosystem that services deposition tools, metrology tools and the service providers that we use for that has all gotten more strained.

So I try to keep the fixed costs down and headcount costs controlled in that way. But to some extent, these variable costs are a little bit more out of our control. And I think the environment that we're in makes that a little bit more expensive.

Mike Bishop

And there's a number of questions coming in on the Q&A line. So I'll just fire them off if you don't mind. On the first one, I think we got a lot of interest in the GAA customers. So there's a number of questions about that. So what is the status of progress with the first and second GAA customers and the corollary is didn't one of them have a significant milestone this quarter where some test results should have been completed? Was it completed successfully? And if so, were there any roadblocks identified?

Scott Bibaud

Yes. So I think I talked a little bit before about exactly what we mean by where we are with those first 2 customers. We're running their silicon, depositing our MSP in it. And then as we go from that, they have lots of different tests they want to run. At a high level, I would say some of them are physical tests. Can we deposit a film in these very complicated structures? Is it uniform? Does it work properly on all kinds of different silicon planes?

And then does it withstand the cleans and the silicon phosphorus that they're going to deposit on top of it and so forth. So we're doing a lot of work like that. And they set some goals and say we want to see your deposition look like X, Y, Z in these -- and we want to be able to measure it and we wanted to meet these. And if we hit that, then we've hit a milestone. And then the next one might be, oh, we're going to do all these bills. We're going to do other things.

We want to make sure it survived and had good quality after we did all that work. So that's another milestone. And there's a variety of them. They'll eventually get to -- they'll be doing tests of how the deposition, I mean, of the dopant diffusion is withstood and how much it's improved and then electrical testing and then on and on.

The good news is we've been meeting the milestones that have been set for us so far. And we haven't had any cases where they've said, "All right, you guys have gotten to this point. It looks like you're not going to get any further. We're kicking it out. So we're making progress. I can't tell you what all of the milestones are and when we'll complete them, that's -- it's a little bit hard to see, but we're making good progress. I think last quarter, we mentioned that we had hit a milestone with the first guy that we were working with, and we're hoping to do that with some more milestones there and with some of the newer customers. And the first customer -- I mean, the customer we just added recently is a little too early on for us to have hit any of the milestones yet.

Mike Bishop

All right. Great. And in the past, we've talked about an analog customers. And so can we give a progress update with the large customers in analog?

Scott Bibaud

Yes. In my remarks, I commented on that. We are continuing to move lockstep with them. We're working very closely with their engineering team. We're doing wafer runs together. And their goal is to -- it's not exactly the same as the gate-all-around guys in terms of looking at physical results and everything. They're more looking to do electrical testing and prepare for manufacturability. And so we're doing all that, and it's going to -- it's involved a number of wafer runs. We've already done some, and we're in the middle of doing more right now. But progress is good. We have their full attention. And I really think they are very hopeful that MST can deliver what they're looking for to give them this big advantage they want in their next node.

Mike Bishop

Okay. And then in the past, we've talked about possibly reengaging with STMicroelectronics. What's the current progress update there?

Scott Bibaud

Yes. We definitely are still engaged with STMicro. I think relationships are good. We -- I think we've shown them some very good stuff, and they are I'm trying to figure how to phrase this without giving away confidential information on STMicro, but I think they really like what we've shown them. And I think eventually, we will do a deal together, but I can't announce that yet.

Mike Bishop

Okay. And you haven't commented on the equipment partnership. Do you see customers requesting that tools be preconfigured to run MST? And how is that partnership going generally?

Scott Bibaud

Yes. So the partnership has been really good for us. It helped us -- I talked about like in gate-all-around how we had to demonstrate MST on a on a vehicle before they would consider using us on their own customer silicon. And that's one of the things that we got from our partners, and they work really closely with us to do that work. So yes, that's been very good, and it continues. As we get -- ideally, what we would like to have is that we would like to get our MST installed at a customer's fab and working directly with the customers on integrating MST into their process.

So to the extent that we get to that point, then we can really thank our strategic partner for helping us to get to that point at that point, but then we're not relying on them as much. Yes. I think I'm forgetting the second half of the question.

Mike Bishop

Generally, just how is the partnership going...

Scott Bibaud

Yes, it's going well. It's going well. So still, we continue to have -- oh, I think I know what you asked. You asked if the customers' equipment should be especially configured for MST, like preconfigured before it goes up. In fact, it's not necessary. Every standard tool, generic tool that one of the -- our strategic partners delivers to the market can be configured for MST. Every tool in order to make it work, you have to plug different gases into it to have them flow in the chamber. And with MST, you have to plug a slightly different gas in. They have some special software they install for MST to regulate those gases and make sure that there's no safety issues or anything. That's already done. So there's not really any issue about making a preconfigured tool to go out in the market.

Sometimes the -- our strategic partner and other equipment OEMs will preconfigure a what they call a module where they put multiple tools together to accomplish something. And our strategic partner definitely understands our technology enough and has the know-how to be able to integrate them into a module if they needed to. So we're prepared for that.

Mike Bishop

All right. And another question is, what is the current number of MST wafer Prima customers? And what is the expected time line to enter volume production based on MST wafers?

Scott Bibaud

I'm not sure I know the answer to that question. We have customers in the pipeline going from those that were in the early days of pitching the Prima type solutions to those that are later in the pipeline, especially for GaN customers and RF-SOI customers. So yes, it's several, but I can't really give you a time line for production where we don't really have good visibility into that yet.

Mike Bishop

Okay. I think that concludes the questions that have come in, Scott. So why don't you prepare -- conclude with closing remarks.

Scott Bibaud

Sure. All right. Well, once again, as usual, I'd like to thank you all for joining us to hear the progress here at Atomera. Please continue to look for our news articles, white papers and blog posts, which are available along with investor alerts on our newly refreshed website, atomera.com. I'd also like to note that we're attending the Craig-Hallum Alpha Select Conference in New York in November and look forward to seeing some of you there. Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. Thanks for your support, and we look forward to our next update call.

Mike Bishop

Thanks, everyone. This concludes the conference call.