Atomera (ATOM) 2026年第三季度业绩电话会:GAA进展与IQE 氮化镓合作
Atomera公布2026年第三季度录得零营收,GAAP净亏损扩大至600万美元,现金及短期投资降至3480万美元。业务方面,GAA技术合作拓展至三家主流公司;存储业务向DRAM与3D NAND延伸;与IQE签署联合开发协议以推进硅基氮化镓量产。管理层预计第四季度晶圆交付营收约5万美元,Non-GAAP营业费用指引维持在1825万至1875万美元区间上限附近。
核心要点
- Atomera公布2026年第三季度录得零营收,而上年同期为1.1万美元,2026年第二季度为15.8万美元,原因在于本季度未发生产生营收的晶圆出货。
- 按通用会计准则(GAAP)计算,净亏损从上年同期的560万美元扩大至600万美元;按非通用会计准则(Non-GAAP)计算,净亏损为460万美元,而2025年第三季度为440万美元。
- 截至本季度末,现金、现金等价物及短期投资总额为3480万美元,低于6月30日的3840万美元。经营性现金消耗为320万美元。
- Atomera目前已与四家正在开发全环绕栅极(GAA)技术的公司中的三家展开合作,并继续与第四家保持积极沟通。其中两家客户正在客户芯片上测试MST,而第三家客户尚处于较早期的评估阶段。
- 该公司将其存储业务拓展至下一代DRAM及3D NAND领域,并与IQE签署了联合开发协议,以推动支持MST的硅基氮化镓晶圆迈向量产。
- 管理层预计第四季度晶圆交付营收约为5万美元,并继续将2026年Non-GAAP营业费用指引维持在其1825万至1875万美元预测区间的上限附近。
关键财务数据
| 指标 | 2026年第三季度 | 对比与背景信息 |
|---|---|---|
| 营收 | $0 | 2025年第三季度为1.1万美元;2026年第二季度为15.8万美元 |
| GAAP净亏损 | 600万美元 | 2025年第三季度为560万美元 |
| GAAP每股亏损 | 0.15美元 | 2025年第三季度为0.17美元 |
| Non-GAAP净亏损 | 460万美元 | 2025年第三季度为440万美元 |
| GAAP营业费用 | 630万美元 | 同比增加约65.2万美元;环比减少约56.3万美元 |
| Non-GAAP营业费用 | 460万美元 | 同比增加约24.9万美元;环比减少57.2万美元 |
| 股权激励费用 | 170万美元 | 上年同期为130万美元 |
| 现金、现金等价物及短期投资 | 3480万美元 | 截至2026年6月30日为3840万美元 |
| 经营活动所用现金 | 320万美元 | 2026年第二季度为390万美元;2025年第三季度为340万美元 |
| 发行在外股数 | 3910万股 | 截至2026年9月30日 |
Atomera在第三季度未通过其市价发行(ATM)增发计划出售股票,标志着连续第二个季度未进行ATM售股。
业务与经营业绩
全环绕栅极合作范围扩大
Atomera实现了其设定的2026年目标,即与领先的全环绕栅极(GAA)开发者展开积极合作。该公司正在与市场中四家参与者中的三家合作,并继续与第四家洽谈。
两家客户正在其自有的硅片上测试MST沉积,并评估薄膜均匀性、与后续工艺的兼容性、杂质掺杂扩散控制以及电气性能。管理层表示,Atomera已完成迄今为止设立的里程碑,没有客户因结果失败而终止评估。第三家合作仍处于早期阶段。
存储器业务机遇拓展至DRAM和NAND
在DRAM方面,Atomera瞄准了高带宽内存(HBM)中使用的前沿逻辑基底晶圆以及4F²垂直单元架构。管理层表示,MST有助于控制垂直晶体管中的磷扩散,同时有可能省去高成本的工艺步骤。该公司于9月在SISPAD研讨会上发表的一篇同行评审论文中展示了这一方法。
在3D NAND方面,Atomera正在探索更短的CMOS栅极长度,以解决逻辑裸片与不断扩大的存储阵列裸片之间潜在的尺寸失配问题。尽管管理层提及了领先存储制造商的兴趣以及相关的硅片支持数据,但与客户的这些讨论仍处于早期阶段。
与IQE达成协议,提供硅基氮化镓制造路径
Atomera与IQE签署了一项联合开发协议,涵盖在MST硅衬底上生长氮化镓(GaN)外延。该工作旨在优化低成本、高性能的射频硅基氮化镓晶圆,并为大批量制造及客户送样开辟一条切实可行的路径。
管理层表示,射频氮化镓(RF GaN)市场目前规模约为12亿美元,几年内可能接近20亿美元。与IQE的协议还涵盖功率应用,尽管初始重点是射频。
推出Prima和Selecta产品品牌
Atomera推出了用于毯式沉积MST起始晶圆的Prima品牌,以及用于在半导体器件内部选择性集成MST的Selecta品牌。在过去一年中,Prima的应用范围已从两个增加到六个,包括RF-SOI、硅基氮化镓和存储器。
管理层认为,Prima产品通常能够更快迈向量产,因为客户无需重新设计整个晶体管工艺即可对起始晶圆进行评估和集成。Selecta则用于包括全环绕栅极(GAA)和功率器件在内的应用。
该公司主要的新模拟与功率项目仍在按计划推进,目前正在开展联合晶圆试产,以便未来可能在客户的下一代器件节点中采用MST。
管理层业绩指引
- Atomera预计将在2026年第四季度确认约5万美元的晶圆交付营收。管理层提醒称,与晶圆相关的营收波动较大,且长期可见度有限。
- 预计2026财年全年Non-GAAP营业费用仍为1850万美元左右(上下浮动25万美元)。由于设备租赁、计量和器件制造成本增加,管理层继续预计结果将接近该区间的上限。
- 第四季度的经营性现金消耗将有所增加,主要是因为公司在10月1日支付了一笔约140万美元的一次性款项,预付了2027全年的200毫米设备租赁费。管理层表示,这不应被解读为基础现金消耗率发生了改变。
- 由于关于某些设备租赁条款的谈判仍在进行中,公司未提供2027年的费用指引。
风险与关注点
- 由于晶圆交付呈现不连续性且Atomera缺乏长期出货可见度,营收仍存在高度波动性。
- 先进制程节点客户在采用新材料前需要多项技术验证,这使得全环绕栅极(GAA)的认证时间表难以预测。
- 尽管客户对Atomera的DRAM和NAND方案表现出兴趣,但存储器方面的合作仍处于相对早期阶段。
- 管理层目前尚缺乏充分的可见度来提供Prima晶圆的量产时间表。
- 行业供给紧张正在推高设备使用、租赁、计量以及器件制造的成本。
- 如果多个客户现场的安装工作与Atomera自身设施的工作发生重叠,可能需要额外的技术人员。
分析师问答环节亮点
- 全环绕栅极里程碑:管理层表示,前两家客户正在其自有硅片上评估MST。Atomera迄今已达成各项里程碑,而新增加的第三家客户尚未推进到完成里程碑的阶段。
- IQE开发时程:管理层将规划中的IQE合作描述为短期项目,而非多年开发项目,但未提供量产日期。
- RF-SOI扩展:根据客户合作进展,Atomera认为其RF-SOI技术解决方案已成熟立足。当前的工作重点是实现更快的MST沉积速度,以及建立能够支持大批量晶圆生产的制造流程。
- Prima与Selecta对比:管理层表示,Prima起始晶圆产品更有可能更快进入生产,因为其认证路径可能比选择性集成的Selecta工艺更短。
- 意法半导体:Atomera继续与意法半导体(STMicroelectronics)保持合作。管理层对双方合作关系以及向客户展示的技术成果表达了信心,但表示目前尚无协议可供公布。
- 运营产能:该公司目前预计不会大幅扩充员工人数,但客户现场的安装活动可能会产生对增加反应腔操作人员的需求。
财报电话会议完整文字实录
完整财报电话会议逐字稿
管理层陈述
Mike Bishop
Hello, everyone, and welcome to Atomera's Third Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations. As in prior quarters, we are using Zoom, and we will follow a similar presentation format with [Operator Instructions] we will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website.
Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company's annual report on Form 10-K filed with the SEC on February 24, 2026.
Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website. And with that, I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.
Scott Bibaud
Thanks, Mike, and good afternoon, everyone. When I look back on Q3, what stands out is how many long-running efforts came to a head in the last 90 days. We hit a gate-all-around target we publicly committed to in February. We extended MST into a part of the memory market we've never served before, and we turned our GaN on Silicon breakthrough into a manufacturing relationship with a world-class wafer supplier. Let me take those in order, gate-all-around first, then memory, then our power and RF pipeline, and I'll close on GaN.
Gate-all-around is quite simply the hardest manufacturing problem the industry is facing today, building transistors with features thousands of times thinner than a human hair while holding individual dopant atoms exactly where they belong through the downstream thermal budget is precisely the kind of problem MST was created to solve.
Only 4 companies in the world are developing gate-all-around and back in February, I set a clear objective for the year to be actively engaged with the leaders driving this transition. Today, I can tell you we've met that objective. We're now engaged with 3 of the 4 gate-all-around customers, and we remain in active dialogue with the 4. If our efforts with these players pan out, MST will become a standard ingredient in all future leading-edge logic nodes. While each of these engagements are in a different phase from early evaluation stage to running development demonstrations on customer silicon, together, they position MST as a solution to one of the biggest challenges confronting teams developing gate-all-around nodes and the CFET generation that follows it.
Advanced node customers move deliberately, asking for proof point after proof point before they take any new material into production. So every stage we clear carries weight. Memory is where I see the curve bending upwards fastest. The pressure on memory makers to bring more capacity and performance out of every wafer has rarely been greater. And importantly, they have both the urgency and the resources to qualify new approaches. In Q3, we broadened our reach to memory manufacturers spanning both halves of the market, next-generation DRAM and NAND flash.
Let me linger on DRAM for a moment because it shows how MST creates value for 2 different next-gen DRAM requirements. First, AI has driven demand for high-bandwidth memory, which uses leading-edge logic as the base wafer. We are leveraging our gate-all-around know-how and using it to help achieve similar gains in these base wafers.
Second, for decades, the industry made DRAM cells smaller with finer lithography, but that lever is nearly exhausted. The next move for some memory makers is a denser cell, the industry calls 4F squared, which tips the access transistor up on its end, a virtual channel and places the storage capacitor above it, shrinking cell area by about 1/3 with no change in lithography.
The challenge is building a good vertical transistor, and that's Atomera's opening. We are leveraging our phosphorus blocking know-how from gate-all-around to precisely control the dopants, preventing movement into places where they shouldn't be. MST-based vertical transistors can hit the drive current and leakage targets 4F squared requires while stripping out costly process steps. In other words, a cheaper and more manufacturable road to the next DRAM generation. We laid this out in a peer-reviewed paper at SISPAD in September, the industry's premier conference for process and device simulation.
And the response to our paper proved that we were tackling a big problem the industry is grappling with. More importantly, recent visits with the leading memory manufacturers confirmed their interest in just such a solution. NAND is the newer story. As I mentioned last quarter, AI is driving demand for higher-density SSDs, which means the number of layers in a 3D NAND device has to keep climbing. But as layer count increases, so does the logic required to drive it. And the CMOS-based die is projected to grow faster than the memory array die sitting above it. Because of that, CMOS wafer -- because the CMOS wafer is bonded to the array, a size mismatch between the 2 can become an expensive problem. MST helps solve it by enabling shorter gate lengths so the 2 die can be size to match, making for far more cost-effective solutions. These engagements are still early, but they're encouraging, both in terms of the customer problem we're addressing and the real silicon data behind our approach.
And as you can imagine, the market size is enormous. Across the rest of the pipeline, momentum is steady. Our large ongoing program with a major analog and power manufacturer is tracking to plan. The 2 engineering teams are in lockstep executing wafer runs with the objective of including MST in the next node of customer devices. Elsewhere in power and RF-SOI, we're moving several new customers forward, putting MST to work on devices like trench and HTs whose efficiency and high-frequency behavior matter more by the day as AI data centers reshape how power is delivered.
And internally, our high-throughput RF-SOI process effort, we're locking down the right substrate supply chain is pivotal, keeps advancing and should translate to other applications as well. That brings me to GaN-on-silicon, which was a standout this quarter. Start with the size of the prize. As RF moves to the next generation, designers increasingly reach for GaN because of its raw power and bandwidth right up to fully integrated front ends that fold in the power amplifier.
The RF GaN market sits near $1.2 billion today and is compounding at double digits towards roughly $2 billion within a few years. Moreover, this breakthrough is likely to expand the TAM by opening new applications, which integrate with silicon devices at 200- and 300-millimeter wafer sizes.
As a reminder, our breakthrough earlier this year brought MST-enabled GaN-on-silicon within striking distance of advanced RF-SOI on the 2 numbers designers live by, loss and linearity, but on a low-cost silicon wafer rather than a costly specialty substrate that this type of performance has typically demanded. If design activity starts shifting towards GaN-on-silicon, we'd be standing at the front of a large and fast expanding market. This quarter, we announced something new, a route to manufacturing in the form of a joint development agreement with IQE announced last week.
IQE is among the world's foremost manufacturers of compound semiconductor epitaxy, the precision crystal growth step beneath every GaN wafer. Under the JDA, IQE's GaN epitaxy grown on MST silicon substrates will be optimized to identify the best low-cost, high-performance RF GaN-on-silicon wafers possible. This work, which has already begun, will allow us to improve performance. At the same time, we are solving the manufacturing side of the equation, meaning we short circuit the qualification cycle normally required before production.
A JDA like this is what moves us from a lab result to a product. IQE gives us a credible, high-volume production path and a way to put real sample wafers into the hands of foundry, IDM and fabless designers. We're starting with RF, but the agreement covers GaN for power as well, broadening the opportunity further. In short, IQE is a catalyst to get MST GaN-on-silicon to market faster, and we believe they can become an important producer of MST-enabled wafers. Atomera offers MST in 2 forms. One is a blanket deposition that customers can buy and use a starting wafer and the other is deposited inside a customer's transistor.
Over the last few years, we've emphasized starting wafer offerings because they are easier for customers to trial and integrate and therefore, represent a faster path to revenue for Atomera. A year ago, we had 2 applications for those starting wafers, and now we're up to 6, including RF-SOI, GaN-on-silicon, memory applications and more. Therefore, today, we are introducing the Prima brand for those products. Our more traditional offering where MST is integrated selectively into the middle of a semiconductor device will now be known as Selecta.
Applications such as gate-all-around, power devices and HPT use the Selecta process. We're introducing these brand names to highlight the growing importance of starting wafer solutions within Atomera's product portfolio. You'll find much more on Prima Selecta and how MST enhances transistors on our newly refreshed website, which should go live tomorrow. It tells the MST story far more clearly across logic, memory, RF and power, and I'd encourage you to spend a few minutes exploring our offerings there. Putting it together, we delivered on the February gate-all-around goal by reaching 3 of the 4 customers in that market. We widened the memory opportunity to span both DRAM and NAND and rolled out MSD for 4F squared. We kept the power and RF programs on course, and we turned our GaN breakthrough into a future production partnership with IQE. There is indeed a great deal to be excited about at Atomera right now. With that, I'll turn the call over to Frank to review our financials.
Francis Laurencio
Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the third quarter of 2026. This slide shows our summary financials. We recognized no revenue in the third quarter compared with $11,000 in the third quarter of 2025 and $158,000 in the second quarter of this year. As we've noted before, our revenue in recent quarters has consisted of fees tied to wafer deliveries and MST CAD licenses.
Wafer deliveries are lumpy from quarter-to-quarter and no wafer shipments for revenue fell in Q3. Our GAAP net loss for the third quarter of 2026 was $6 million or $0.15 per share compared with a net loss of $5.6 million or $0.17 per share in the third quarter of 2025. On a non-GAAP basis, our net loss was $4.6 million compared with $4.4 million in the third quarter of last year. GAAP operating expenses were $6.3 million in the third quarter, an increase of approximately $652,000 from $5.7 million in the third quarter of 2025 and down about $563,000 from $6.9 million in the second quarter.
Stock-based compensation, which is excluded from our non-GAAP results, was $1.7 million compared with $1.3 million a year ago. On a non-GAAP basis, operating expenses were $4.6 million, up about $249,000 year-over-year and down $572,000 from the second quarter of 2026. Year-over-year, non-GAAP R&D increased by $242,000, driven primarily by higher tool access costs. G&A decreased by $60,000 and sales and marketing increased by $67,000.
The sequential decline from the second quarter primarily reflects nonrecurring items in the first half of this year when we were accruing deferred 2025 bonuses. Looking at G&A on a year-over-year basis, you can see those expenses in Q3 of this year increased only modestly over Q3 of 2025, reflecting normal annual bonus accrual and increased IP legal costs.
Our balance of cash, cash equivalents and short-term investments on September 30, 2026, was $34.8 million compared with $38.4 million on June 30. We used $3.2 million of cash in operating activities in the quarter compared with $3.9 million in the second quarter and $3.4 million in the third quarter of last year. We did not sell any shares under our ATM during the last quarter, our second consecutive quarter with no ATM sales. As of September 30, 2026, we had 39.1 million shares outstanding. I need to make a note about fourth quarter cash usage.
Operating cash used will step up this quarter, primarily because of a roughly $1.4 million onetime payment made on October 1 that prepays the lease for our 200-millimeter tool for all of 2027. I want to flag that now because it shouldn't be read as a change in our underlying run rate. As I mentioned earlier, revenue from wafer shipments is lumpy, and we don't have long-term visibility. We expect to recognize revenue for wafer deliveries this quarter of approximately $50,000.
On our last 2 calls, we said we expected 2026 non-GAAP operating expense to be approximately $18.5 million for the year, plus or minus $250,000. And on the second quarter call, I pointed to the high end of that range. That is still our expectation due to the upward cost trend for tool leases, metrology and device fabrication. We flagged this trend last quarter, and it reflects very tight supply in the industry.
Our negotiations on some tool lease terms are still ongoing. So it is too early to give guidance on 2027 expenses, but we will continue to work on keeping our fixed costs as low as possible. With that, I'll turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?
Scott Bibaud
Thanks, Frank. I hope all of you get a sense for the expanding opportunity space opening up for Atomera and our momentum with leading customers in some really enormous markets. Q3 was a quarter of conversion, a gate-all-around commitment met, memory extended into NAND and 4F squared and a GaN breakthrough carried into a real manufacturing partnership. Our aim from here doesn't change to turn a growing body of simulation and customer silicon evidence into signed agreements that build durable, repeatable revenue with impressive bottom line leverage. Mike, we can now take questions.
Mike Bishop
Thank you, Scott. [Operator Instructions] And right now, our first question comes from Richard Shannon.
分析师问答
Richard Shannon
A couple of questions here. Let's start with gate-all-around, your first topic that you talked about on the call here, a few interesting things to look at here. I guess with the first gate-all-around customer you talked about last quarter, maybe, Scott, if you can just give us a sense of what kind of progress you've made here. I know you made a big step last quarter with the milestone that you're really excited to achieve here. Any way you could characterize the progress since. And I know these learning cycles are oftentimes more than 1 quarter. But if you can help us understand the kind of the progress there and any other milestones you can describe about what you're hoping to achieve maybe this quarter or very soon?
Scott Bibaud
Yes. Let me talk about what customers would expect to see from milestones. So first of all, we have shown on some of our early -- I think on our Q4 earnings call and on some public information, some details of how our MST is integrated into a gate-all-around device and the proof that we've achieved that we can do that on an example device. What is typical with each of these gate-all-around customers is that they -- once we show them that, they start asking us to integrate it onto their silicon or into devices that are much closer to what their silicon looks like. And in many ways, that's an incredibly strong statement of support because to share with us their most confidential gate-all-around devices so that we can do our deposition on them is a big reach for them. It's like they don't do that lightly at all. And I talked about us working with 3 out of 4 today, and we're at that stage with 2 of them. And so there's various milestones that you're going to be in there where they want to see certain physical characteristics of your device in there and your device with some of their technology on top of it, and then they want to be starting to look at electrical results and diffusion blocking results and other things. So all of those are milestones that we have to hit.
So yes, I'd just say that with 2 of our customers, we're at the point where we're in the midst of that. And with one of them, we are earlier to where we're just in the very early stages of the evaluation. But we're really happy about where we are. I think I made the comment about being -- if we're successful, we've always talked about this domino theory. I think if we're successful with these 3 everybody uses MST on all gate-all-around devices. And typically, that would mean they carry it forward into future devices like CFET and beyond.
Richard Shannon
Yes. That makes a little sense. Maybe, Scott, if you can characterize the dynamics regarding the third gate-all-around customer that's coming to what you call active engagement now. Any way you'd characterize the reason for that? Is this the publicly known data that you've shown here or something specific to them? Just help us get a sense of that forcing function.
Scott Bibaud
It's so hard to characterize the customer acquisition process because in many cases, you're kind of knocking on the door and knocking on the door and maybe you get an audience and it's not with the right person are you getting or you're just struggling to find a way into who the right person is. And then finally, you get them and then you're up and running, and that can take a while in some cases. And I would say that's been our experience with a few of these guys, but now we've broken through.
Richard Shannon
Okay. Well, great to hear. Good to see that progress here. Let me ask you a question on the DRAM side here. I think you characterized the industry dynamics here last quarter, kind of a move towards the vertical transistors here in this 4F squared approach here. Would you still characterize the efforts here as early stage? Or what we can all see here is a great deal of interest as well as an ability to fund almost any promising alternative or approach to lowering costs and increasing capacity. Would you still characterize the efforts here as very early stage? Or is this advancing quickly such that you can maybe sense or even see the light at the end of the tunnel there?
Scott Bibaud
Yes. I still think it's relatively early stage on the memory. We -- you may remember, we've been talking about DRAM for many years, and we had an approach that was really focused at LPDDR and like real DRAM. And I think as AI started to ramp up in the last few years, some of the development efforts in that area got redirected much more towards high-bandwidth memory. where the offering that we have for DRAM was less attractive. And so we've adjusted our offerings and now we're looking at everything that's like in these next-generation 3D areas that are super interesting to customers.
In a lot of cases, they are the Prima type of wafer-based solution from us, which will be easier for them to evaluate and adopt. And so I'm hopeful that things move along relatively quickly, but we still are in a bit in the early stages.
Richard Shannon
Okay. That's what I figured. I just want to get a little characterization there. The third question I had was regarding GaN, especially RF and specifically your announcement with IQE last week, which I found quite interesting. I'd love to get a sense of the reasons for IQE wanting to work in the space here. having watched them from my coverage of compound semis for 15-plus years, IQE tends to only move towards these kinds of work partnerships unless they see a very clear end and goal here fairly soon. They generally run on thinner margins, so it's hard for them to reach too far out in front of their skis here.
And my guess is, and I'd love to get your sense of the degree to which this is -- this partnership is based on customers that would be ultimately licensing the technology from you are driving this? Or is this more of a build and they will come initiative on their part?
Scott Bibaud
Yes. So I don't want to comment too much on IQE's motivations, but -- but I will tell you, I think your characterization is right. They are a company that doesn't take on JDA partners lightly. They try to really focus on production vehicles and doing things that are close to production. I think they see a lot of promise in MST and the early data that we've put out there. We've had some very good senior level meetings with them. And I think there's a great opportunity that if we can deliver, I think we can deliver IQE more customers for their GaN production. And so I won't comment on how early they see that happening, but the development that we have contemplated with them is not like a multiyear effort. It's a shorter-term thing that we hope will turn to something faster.
Richard Shannon
Okay. That's fair. That seems to make sense. A couple more questions for me. First of all, I want to touch on RF-SOI. You mentioned last quarter as well, and I think you used the phrase here this quarter, working to enable a high throughput manufacturing flow for RF-SOI. Maybe just describe how far through that process you are? And are there any other steps to enable this technology ecosystem? This is one we've been tracking for a while. And my personal thought, I thought we would have gotten to the point where there would be a production volume in the space here. And so I want to get a sense of how mature that is? And are there other milestones to enable RF-SOI to move forward?
Scott Bibaud
Yes. So our technical solution for RF-SOI is pretty well proven. We've worked with a number of customers to show that. We do have a limited ability to show real silicon test data on that because all of the RF work that we've done has been on customer silicon. It's hard to do on your own silicon. Regardless, we think we have a very good solution there. What the high-volume production path that I've mentioned is we need to be prepared for the day that someone wants to launch in production and do a very high volume per month.
And so we've been talking with manufacturing partners, and they'd like to see an MSP throughput rate that's very -- more rapid than we're doing in R&D. So we have actually done a lot of work to speed up the MST throughput, deposition throughput and even consider doing that throughput on atmospheric tools, which is unusual for us, but it allows the higher pressure does allow you to manufacture wafers at much higher volume. So yes, so we're hoping that when we finally break through and if we get a market up and running on this gate-all-around that we'll be able to deliver that high-volume solution to go with it.
Richard Shannon
Okay. So are you saying that there's work going on with high throughput that would aid not only RF-SOI, but also gate-all-around? Is that what that last comment means?
Scott Bibaud
The interesting thing is that it could apply to many markets, primarily this Prima -- I mean, Prima wafer-based solutions. But yes, it could be applied to a number of them.
Richard Shannon
Okay. And that kind of hit -- kind of directed me to the last question here, which is what I thought of as the blank wafer, which I think you're now marketing as Prima. I made 2 interesting comments I'd love to delve into. First, you said that a year ago, you only had 2 applications in this and now you have 6. And noting what you said in the past where this is a -- should be a much easier route to market. And the fact you have now 6 applications instead of 2 just a year ago seems very interesting to me. So wondering if you could characterize for us the level of maturity across any and all of those 6 applications here. And while I know you've been very reticent to declare which ones -- which end market or even customers are going to get to market first here, Hopefully, it's generic enough to ask you whether you think the Prima brand is the one that gets you across the finish line first to get you in production. Is that a -- do you think that's a strong likelihood? Or is that still one where you're reticent to answer directly?
Scott Bibaud
Yes. I'm always reticent to answer, but no, I think that Prima is -- has a good chance of going faster. With Selecta, which is what we used to call these MST -1 and MST -2, but Selecta is something that people would use for gate-all-around or for power devices. And we know we've been working with customers on that for a while. But once they've integrated it, they've gotten performance going really well, then they have to put it into a process qualification cycle, which isn't all that difficult or long. But then they need to have people design chips with it and then they will go into production, and that's the point at which we're kind of generating royalties. With a product like Selecta, and let's just talk about GaN as an example. So if we got GaN, our GaN solution with IQE tuned up really well in the next 6 months, then really IQE could run just a couple of months' worth of qualification and then start shipping wafers for revenue.
And so it's a lot faster to be able to go to production with the Prima type of product. So although I'm not handicapping the existing customer engagements we have right now, I would say, on balance, if you had 2 of them, the Prima ones will go first.
Richard Shannon
Okay. That makes sense. I ask one more question here. I always like to engage Frank with at least one question here, and I'll just ask it quickly on the OpEx number here. I know you're reticent to suggest how we should look at this line for next year, and I get the rising input costs here to help us think about that. But I guess the one thing I would ask, which I know I have in the past here is it sounds like you guys have a great deal of activity across a lot of different applications, customers and partners that seems like you could be highly utilized and might need to open up the aperture of headcount to enable all of these avenues. Is that something you're contemplating for next year?
Francis Laurencio
So I think that's largely going to be driven by the activity that happens next year where I don't foresee that we need to add headcount right now. But the one thing that could strain headcount is we have operators that work on doing EPI on the reactors that we have to run demos for customers to do our R&D. And to the extent that there is installation activity at customers, and we need to send people on site, if we're balancing that across either multiple customers or a customer and ongoing activity in our own facility, then yes, I could see that, that would be an area that we might need to add additional headcount. But other than that, I don't see headcount being the big issue. I think inflation in the industry is a real issue. If you follow any of the other wafer fab equipment vendors, you've heard a lot of commentary about supply chain difficulty in terms of getting equipment just to be able to deliver them. So that entire ecosystem that services deposition tools, metrology tools and the service providers that we use for that has all gotten more strained.
So I try to keep the fixed costs down and headcount costs controlled in that way. But to some extent, these variable costs are a little bit more out of our control. And I think the environment that we're in makes that a little bit more expensive.
Mike Bishop
And there's a number of questions coming in on the Q&A line. So I'll just fire them off if you don't mind. On the first one, I think we got a lot of interest in the GAA customers. So there's a number of questions about that. So what is the status of progress with the first and second GAA customers and the corollary is didn't one of them have a significant milestone this quarter where some test results should have been completed? Was it completed successfully? And if so, were there any roadblocks identified?
Scott Bibaud
Yes. So I think I talked a little bit before about exactly what we mean by where we are with those first 2 customers. We're running their silicon, depositing our MSP in it. And then as we go from that, they have lots of different tests they want to run. At a high level, I would say some of them are physical tests. Can we deposit a film in these very complicated structures? Is it uniform? Does it work properly on all kinds of different silicon planes?
And then does it withstand the cleans and the silicon phosphorus that they're going to deposit on top of it and so forth. So we're doing a lot of work like that. And they set some goals and say we want to see your deposition look like X, Y, Z in these -- and we want to be able to measure it and we wanted to meet these. And if we hit that, then we've hit a milestone. And then the next one might be, oh, we're going to do all these bills. We're going to do other things.
We want to make sure it survived and had good quality after we did all that work. So that's another milestone. And there's a variety of them. They'll eventually get to -- they'll be doing tests of how the deposition, I mean, of the dopant diffusion is withstood and how much it's improved and then electrical testing and then on and on.
The good news is we've been meeting the milestones that have been set for us so far. And we haven't had any cases where they've said, "All right, you guys have gotten to this point. It looks like you're not going to get any further. We're kicking it out. So we're making progress. I can't tell you what all of the milestones are and when we'll complete them, that's -- it's a little bit hard to see, but we're making good progress. I think last quarter, we mentioned that we had hit a milestone with the first guy that we were working with, and we're hoping to do that with some more milestones there and with some of the newer customers. And the first customer -- I mean, the customer we just added recently is a little too early on for us to have hit any of the milestones yet.
Mike Bishop
All right. Great. And in the past, we've talked about an analog customers. And so can we give a progress update with the large customers in analog?
Scott Bibaud
Yes. In my remarks, I commented on that. We are continuing to move lockstep with them. We're working very closely with their engineering team. We're doing wafer runs together. And their goal is to -- it's not exactly the same as the gate-all-around guys in terms of looking at physical results and everything. They're more looking to do electrical testing and prepare for manufacturability. And so we're doing all that, and it's going to -- it's involved a number of wafer runs. We've already done some, and we're in the middle of doing more right now. But progress is good. We have their full attention. And I really think they are very hopeful that MST can deliver what they're looking for to give them this big advantage they want in their next node.
Mike Bishop
Okay. And then in the past, we've talked about possibly reengaging with STMicroelectronics. What's the current progress update there?
Scott Bibaud
Yes. We definitely are still engaged with STMicro. I think relationships are good. We -- I think we've shown them some very good stuff, and they are I'm trying to figure how to phrase this without giving away confidential information on STMicro, but I think they really like what we've shown them. And I think eventually, we will do a deal together, but I can't announce that yet.
Mike Bishop
Okay. And you haven't commented on the equipment partnership. Do you see customers requesting that tools be preconfigured to run MST? And how is that partnership going generally?
Scott Bibaud
Yes. So the partnership has been really good for us. It helped us -- I talked about like in gate-all-around how we had to demonstrate MST on a on a vehicle before they would consider using us on their own customer silicon. And that's one of the things that we got from our partners, and they work really closely with us to do that work. So yes, that's been very good, and it continues. As we get -- ideally, what we would like to have is that we would like to get our MST installed at a customer's fab and working directly with the customers on integrating MST into their process.
So to the extent that we get to that point, then we can really thank our strategic partner for helping us to get to that point at that point, but then we're not relying on them as much. Yes. I think I'm forgetting the second half of the question.
Mike Bishop
Generally, just how is the partnership going...
Scott Bibaud
Yes, it's going well. It's going well. So still, we continue to have -- oh, I think I know what you asked. You asked if the customers' equipment should be especially configured for MST, like preconfigured before it goes up. In fact, it's not necessary. Every standard tool, generic tool that one of the -- our strategic partners delivers to the market can be configured for MST. Every tool in order to make it work, you have to plug different gases into it to have them flow in the chamber. And with MST, you have to plug a slightly different gas in. They have some special software they install for MST to regulate those gases and make sure that there's no safety issues or anything. That's already done. So there's not really any issue about making a preconfigured tool to go out in the market.
Sometimes the -- our strategic partner and other equipment OEMs will preconfigure a what they call a module where they put multiple tools together to accomplish something. And our strategic partner definitely understands our technology enough and has the know-how to be able to integrate them into a module if they needed to. So we're prepared for that.
Mike Bishop
All right. And another question is, what is the current number of MST wafer Prima customers? And what is the expected time line to enter volume production based on MST wafers?
Scott Bibaud
I'm not sure I know the answer to that question. We have customers in the pipeline going from those that were in the early days of pitching the Prima type solutions to those that are later in the pipeline, especially for GaN customers and RF-SOI customers. So yes, it's several, but I can't really give you a time line for production where we don't really have good visibility into that yet.
Mike Bishop
Okay. I think that concludes the questions that have come in, Scott. So why don't you prepare -- conclude with closing remarks.
Scott Bibaud
Sure. All right. Well, once again, as usual, I'd like to thank you all for joining us to hear the progress here at Atomera. Please continue to look for our news articles, white papers and blog posts, which are available along with investor alerts on our newly refreshed website, atomera.com. I'd also like to note that we're attending the Craig-Hallum Alpha Select Conference in New York in November and look forward to seeing some of you there. Should you have additional questions, please contact Mike Bishop, who will be happy to follow up. Thanks for your support, and we look forward to our next update call.
Mike Bishop
Thanks, everyone. This concludes the conference call.
本文部分内容由AI生成和翻译并经人工审核,仅供参考与一般资讯用途,不构成投资建议。









